Question & Answer
Question
Why do I get an abend ASRA for program check 0C6 in module AESFCICS + X'2A' after upgrading CA Spool from CA Technologies? It looks like CICS module DFHAPLI takes a wild branch into module AESFCICS at a spot that isn't a valid instruction. This causes a specification exception in AESFCICS.
Answer
Format the Kernel domain in a system dump of the abend 0C6 by entering the IPCS command VERBX DFHPDxxx 'KE=1' (where xxx is your release level of CICS like 700 for CICS TS 5.3). The KE Error Table entry for this program check has:
AB/UASRA RIDS/AESFCICS
Error Code: 0C6/AKEA
Error Type: PROGRAM CHECK
Branch Event Address: Module DFHAPLI + X'2E00'
CICS Error Instruction Address: 000BD02A Module AESFCICS + X'2A'
Instruction Length: 2
Interrupt Code: 0006
CICS Registers: R15: 800BD028 Module AESFCICS + X'28'
The PSW address for and abend S0C6 points at the instruction after the failing instruction. You can subtract the Instruction Length to find the failing instruction at AESFCICS + X'28'. Register 15 points at that failing instruction.
The Loader Domain (LD) shows that offset +x'28' is the Entry Point for module AESFCICS.
Program Entry Load CICS PTF
Name Point CSECT Point Rel. Level
AESFCICS 000BD028 DFHYA410 000BD000 410
Rather than a wild branch, CICS is turning control over to module AESFCICS exactly where is should. The problem is that module AESFCICS was not updated correctly during the upgrade of the CA-SPOOL product.
We found that a step was missed when installing the new release of the CA-SPOOL product using CA-CSM. Prior to applying the usermod for the CICS Interface (BQ4JCICS), you must run member CBQ4JCL(BQ4JIUCL). This will update SMP/E with information about the relationship between source and macros. A return code of 04 is acceptable when running this job. Once BQ4JIUCL was run, module AESFCICS' entry point then contained valid instructions.
Product Synonym
CICS/TS CICSTS CICS TS CICS Transaction Server
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Document Information
Modified date:
17 January 2018
UID
dwa1418693