Coherent Accelerator Processor Interface (CAPI)

Transform your enterprise and accelerate innovation

Features Benefits
Customizable accelerator Application developers can create an accelerator specifically tailored to their application using an FPGA platform. This specialization can improve performance.
Virtual addressing An accelerator acts as a peer to the POWER8 cores, creating a truly shared memory space between the application and FPGA accelerator. The accelerator essentially becomes another thread of the application. Address translation is managed by the POWER8 processor.
Coherency Application developers use a hardware managed 256KB cache in the FPGA for improved latency and synchronization with the main application threads.
The FPGA cache is fully coherent with the caches in the POWER8 cores.
Simple API Application developers can easily start and control the accelerator.
The API features an intuitive programming interface similar to any multi-threaded application.
Flexible programming model Application developers determine the best programming model for their application. The application can either dispatch work for the accelerator or the accelerator can act independently. This flexibility enables devices such as edge-of-network accelerators to process incoming work independently and to notify the main application when data is ready.
Extendable architecture Application developers can choose an OpenPOWER Foundation partner device, such as Nallatech’s CAPI Developer Kit.
Extendable to other FPGA platforms, the architecture uses card features such as Ethernet and DRAM.
In addition, the architecture supports prepackaged CAPI solutions such as the IBM Data Engine for NoSQL.