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Here are the show notes for Episode 0 “Sic Parvis Magna” (“Greatness From Small Beginnings”).
We’re structuring each podcast episode (loosely) in three parts:
We’ll post useful links and supplementary information in each episode’s show notes.
Our “Mainframe” topic is about an SPE to z/OS 2.1 for SDSF.
APARs mentioned were:
Our “Performance” topic is about detecting address spaces in support of FPGA cards.
Some useful information on the new PCIE and FPGHWAM address spaces is here.
Other things we discussed were:
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